Reducing Power Dissipation in SRAM during Test
نویسندگان
چکیده
منابع مشابه
Reducing Power Dissipation in SRAM during Test
In this paper we analyze the power consumption of SRAM memories and demonstrate that the full functional pre-charge activity is not necessary during test because of the predictable addressing sequence. We exploit this observation in order to minimize power dissipation during test by eliminating the unnecessary power consumption associated with the pre-charge activity. This is achieved through a...
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A novel approach for minimizing power during scan testing is presented. The idea is that given a full scan module or core that has multiple scan chains, the test set is generated and ordered in such a way that some of the scan chains can have their clock disabled for portions of the test set. Disabling the clock prevents flip-flops from transitioning, and hence reduces switching activity in the...
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Motivation for reducing power dissipation during test application is presented. A scheme for reducing power dissipation during test application, when scan test structure is used, is proposed. Algorithms required to exploit the proposed technique are discussed. Experimental results are presented. keywords: Power dissipation, Full Isolated Scan, Full Integrated Scan.
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Yield, Reliability and Power Supply considerations motivate the need to minimize power dissipation during test application. Two techniques for minimizing power dissipation when tests are applied to static CMOS combinational circuits are proposed. They are: (i) Test set ordering; and (ii) Repetition of test vectors. We show that: although (i) is NP-Hard good heuristics can be developed; and an o...
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In this paper, we have proposed the concept of 7Transistor SRAM. 7-Transistor SRAM has been designed to provide an interface with CPU and to replace DRAM in systems that require very low power consumption. The feature of 7Transistor SRAM like low power consumption and leakage current have been analyzed with 45nm technology. The comparative study and mathematical modeling have been proposed for ...
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ژورنال
عنوان ژورنال: Journal of Low Power Electronics
سال: 2006
ISSN: 1546-1998,0000-0000
DOI: 10.1166/jolpe.2006.062